IC tag

ABSTRACT

The present invention provides an IC tag which has a structure comprising a first adhesive layer laminated on a surface of a substrate sheet, an electronic circuit containing a circuit line having a bypass line and an IC chip connecting to the electronic circuit which are formed on a surface of the first adhesive layer, a second adhesive layer laminated for covering the electronic circuit and the IC chip, and a release agent layer formed partly at the position corresponding to a circuit section consisting of the electronic circuit and the IC chip and located at the interface between the substrate sheet and the first adhesive layer, wherein the angle formed by the tangent of the bypass line at the connection between the bypass line and the circuit line and the tangent of the circuit line at the connection is 10 degree or greater. When the IC tag attached to an article is peeled off, the built-in electronic circuit is surely broken.

This is a National Stage entry of International ApplicationPCT/JP2003/014827, with an international filing date of Nov. 20, 2003,which was published under PCT Article 21(2) on Jun. 3, 2004 as WO2004/047017 A1, and the complete disclosure of which is incorporatedinto this application by reference.

FIELD OF THE INVENTION

The present invention relates to an IC tag which can break a built-inelectronic circuit when the IC tag attached to an article is peeled off.

DESCRIPTION OF THE PRIOR ART

By attaching an IC tag to articles such as goods, storage articles andloadings, article managements have been conducted recently. For example,the article management has been conducted by attaching an IC tagrecorded by information such as production condition, stock state, costinformation and used condition to the goods and further confirming theinformation by an interrogator, according to needs.

However, when the IC tag attached to the article is insufficient in theadhesive strength of the adhesive used in the IC tag, the IC tag may bere-attached to another article by any causes such as errors and carelessmistakes. And, the IC tag may be re-attached to another articleintentionally. In such situation, article management can be notcorrectly conducted longer.

As conventional IC tags, it is described that when the substratelaminated on the surface of the tag is altered, the surface substrate isbroken in the layer so that the effect for preventing a forgery isincreased (JP 10-171962A1).

However, there is a problem that when the IC tag is peeled by providinga cutting into the interface between an article and an adhesive layer ofthe IC tag attached to the article with a cutter or the like, insertinga finger or the like into the cutting portion and pinching the end ofthe IC tag, the surface substrate can be easily peeled from theelectronic circuit without breaking of the electronic circuit.

DISCLOSURE OF THE INVENTION

As the method for solving the problems described above, it is requiredto conduct the article management correctly by damaging the function ofthe IC tag, when the IC tag is re-attached to another article.

As a result of efforts by the present inventors to solve theabove-described problems, it was found that the problems described aboveare achieved by laminating a first adhesive layer on a substrate sheet,forming an electronic circuit containing a circuit line having a bypassline, in which the angle formed by the tangent of the bypass line at theconnection between the bypass line and the circuit line and the tangentof the circuit line at the connection is 10 degree or greater, and an ICchip connecting to the electronic circuit on the surface of the firstadhesive layer, laminating a second adhesive layer for covering theelectronic circuit and the IC chip, and forming a release agent layerpartly at the position corresponding to a circuit section consisting ofthe electronic circuit and the IC chip and located at the interfacebetween the substrate sheet and the first adhesive layer. Also, it wasfound that the problems described above are achieved by laminating afirst adhesive layer on a surface of a substrate sheet, forming anelectronic circuit having a planar projection extended and an IC chipconnecting to the electronic circuit on the surface of the firstadhesive layer, laminating a second adhesive layer for covering theelectronic circuit and the IC chip, and forming a release agent layerpartly at the position corresponding to a circuit section consisting ofthe electronic circuit and the IC chip and located at the interfacebetween the substrate sheet and the first adhesive layer. And thus thepresent invention is completed.

That is to say, the present invention provides an IC tag which has astructure comprising a first adhesive layer laminated on a surface of asubstrate sheet, an electronic circuit containing a circuit line havinga bypass line, in which the angle formed by the tangent of the bypassline at the connection between the bypass line and the circuit line andthe tangent of the circuit line at the connection is 10 degree orgreater, and an IC chip connecting to the electronic circuit which areformed on a surface of the first adhesive layer, a second adhesive layerlaminated for covering the electronic circuit and the IC chip, and arelease agent layer formed partly at the position corresponding to acircuit section consisting of the electronic circuit and the IC chip andlocated at the interface between the substrate sheet and the firstadhesive layer.

The present invention also provides the IC tag as described above,wherein at least one of bypass line is formed at the position in thecircuit section in which the release agent layer is formed.

The present invention also provides the IC tag as described above,wherein a planar projection is extended to the bypass line.

The present invention also provides an IC tag which has a structurecomprising a first adhesive layer laminated on a surface of a substratesheet, an electronic circuit having a planar projection extended and anIC chip connecting to the electronic circuit which are formed on asurface of the first adhesive layer, a second adhesive layer laminatedfor covering the electronic circuit and the IC chip, and a release agentlayer formed partly at the position corresponding to a circuit sectionconsisting of the electronic circuit and the IC chip and located at theinterface between the substrate sheet and the first adhesive layer.

The present invention also provides an IC tag which has a structurecomprising a first adhesive layer laminated on a surface of a substratesheet, an electronic circuit having a planar projection extended and anIC chip connecting to the electronic circuit which are formed on asurface of the first adhesive layer, a second adhesive layer laminatedfor covering the electronic circuit and the IC chip, and a release agentlayer formed partly at the position corresponding to both end portionsof a circuit section consisting of the electronic circuit and the ICchip and located at the interface between the substrate sheet and thefirst adhesive layer.

The present invention also provides the IC tag as described above,wherein at least one of bypass line is formed at the position in thecircuit section in which the release agent layer is formed.

The present invention also provides the IC tag as described above,wherein the planar projection has an area calculated according to thefollowing formula.S≧(2W)²(In the formula, S is an area of the planar projection, and W is a linewidth of the circuit line adjoining to the planar projection.) Thepresent invention also provides the IC tag as described above, whereinthe release agent layer is formed to cover the range of 20 to 90percents of an area surrounded by an outside circumference of thecircuit section through the first adhesive layer.

The present invention also provides the IC tag as described above,wherein a release liner is formed on a surface of the second adhesivelayer.

The IC tag of the present invention can break a built-in electroniccircuit surely when the IC tag attached to an article is peeled off.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows an outline of a cross-section of an IC tag of oneembodiment of the present invention;

FIG. 2 shows a perspective plane view of an electronic circuit of oneembodiment in an IC tag of the present invention;

FIG. 3 a shows a perspective plane view of an IC tag of anotherembodiment of the present invention and FIG. 3 b shows a cross-sectionalong line 3 b-3 b of FIG. 3 a;

FIG. 4 shows an outline of cross-section of a state that an IC tag ofother one embodiment of the present invention is peeled off;

FIG. 5 shows a plane view of a shape of a circuit line and a bypass lineof one embodiment in an IC tag of the present invention;

FIG. 6 a shows a perspective plane view of an electronic circuit ofanother embodiment in an IC tag of the present invention and FIG. 6 bshows a cross-section along line 6 b-6 b of FIG. 6 a;

FIG. 7 shows an outline of perspective cross-section of an IC tag ofother one embodiment of the present invention;

FIG. 8 shows a perspective plane view of an electronic circuit of otherone embodiment in an IC tag of the present invention;

FIG. 9 shows a perspective plane view of an electronic circuit of otherone embodiment in an IC tag of the present invention;

FIG. 10 shows an outline of perspective cross-section of a state that anIC tag of one embodiment of the present invention is peeled off;

FIG. 11 shows a plane view of a shape of a planar projection extended tothe circuit line of one embodiment in an IC tag of the presentinvention;

In drawings, 1 means a substrate sheet, 2 means a first adhesive layer,3 means an electronic circuit, 4 means a circuit line, 5 means a secondadhesive layer, 6 means an IC chip, 7 means a release agent layer, 8means a bypass line, 9 means a planar projection, 10 means a bondingline, 11 means a release liner, 12 means an article, 13 means a circuitsection, 14 means a connection between the bypass line and the circuitline, 15 means a tangent of the bypass line at the connection betweenthe bypass line and the circuit line, 16 means a tangent of the circuitline at the connection between the bypass line and the circuit line, and17 means a cutting.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The IC tag of the present invention is explained based on the drawings.FIG. 1 and FIG. 7 shows an outline of a cross-section of an IC tag ofone embodiment of the present invention.

The substrate sheet 1 is preferably a sheet composed of a thermoplasticresin.

As the sheet composed of the thermoplastic resin, for example, thesheets composed of one or more of various synthetic resins, such aspolyolefin resin like polyethylene resins of high density polyethylene,middle density polyethylene, low density polyethylene and the like,polypropylene resins of polypropylene,polymethyl-1-pentene/ethylene/cyclic olefin copolymer, andethylene-vinyl acetate copolymer; polyester resins like polyethyleneterephthalate, polyethylene naphthalate, polybutylene terephthalate;polyvinyl chloride resins; polyvinylalcohol resins; polycarbonateresins; polyamide resins; polyimide resins; fluororesins; copolymerscontaining two or more polymerization units thereof; polymer blendscontaining two or more resins thereof; polymer alloys containing one ormore resins thereof can be used. In particular, the sheets composed ofpolyester resins are preferably used. The substrate sheet 1 may beoriented uniaxially or biaxially. The substrate sheet 1 may be composedof single layer or two or more layers of different layers or samelayers. Also, the substrate sheet 1 has preferably water resistance. Ifthe substrate sheet has water resistance, a damage such as breaking ofthe substrate sheet is not caused when the substrate sheet is wet withwater.

Thickness of the substrate sheet 1 does not have any limitation.However, the thickness is generally in the range of 10 to 250 μm andpreferably in the range of 20 to 100 μm.

For increasing the adhesive strength between the substrate sheet 1 andthe first adhesive layer 2, the surface of the substrate sheet 1 can besurface-treated. The surface-treatment includes, for example, coronadischarge treatment, chemical treatment, resin-coating and the like.

Adhesives used in the first adhesive layer 2 include various adhesivessuch as thermo melting adhesives, pressure sensitive adhesives andthermosetting adhesives. The kinds of the adhesive include, for example,natural rubber adhesives, synthetic rubber adhesives, acrylic resinadhesives, polyester resin adhesives, polyvinyl ether resin adhesives,urethane resin adhesives and silicone resin adhesives.

Examples of the synthetic rubber adhesives include styrene-butadienerubber, polyisobutylene rubber, isobutylene-isoprene rubber, isoprenerubber, styrene-isoprene block copolymer, styrene-butadiene blockcopolymer, styrene-ethylene-butylene block copolymer, ethylene-vinylacetate thermoplastic elastomer and the like. Examples of the acrylicresin adhesives include homopolymers of monomer such as acrylic acid,methyl acrylate, ethyl acrylate, propyl acrylate, butyl acrylate,2-ethylhexyl acrylate, methyl methacrylate, ethyl methacrylate, butylmethacrylate, and acrylonitrile, or copolymers of 2 or more of monomersthereof. Polyester resin adhesives are copolymers of a polyhydricalcohol and a polybasic acid. The polyhydric alcohol includes ethyleneglycol, propylene glycol, and butanediol. The polybasic acid includesterephthalic acid, adipic acid, and maleic acid. Examples of thepolyvinyl ether resin adhesives include polyvinyl ether, and polyvinylisobutyl ether. Examples of the silicone resin adhesives includedimethyl polysiloxane. The adhesives can be used singly or incombination of two or more members.

Among the adhesives, the polyester resin adhesives are preferable.

A tackifier, a softener, an antioxidant, a filler, a coloring agent suchas a dye and a pigment or the like can be mixed in the first adhesivelayer 2, according to needs.

The tackifier includes rosin resins, terpene phenol resins, terpeneresins, aromatic hydrocarbon modified terpene resins, petroleum resins,coumarone-indene resins, styrene resins, phenol resins and xyleneresins. The softener includes process oils, liquid rubbers andplasticizers. The filler includes silica, talc, clay, calcium carbonateand the like.

Thickness of the first adhesive layer 2 does not have any limitation.However, the thickness is generally in the range of 1 to 100 μm andpreferably in the range of 3 to 50 μm.

In the IC tag of the present invention, the release agent layer 7 isformed partly at the position corresponding to a circuit section 13consisting of the electronic circuit 3 and the IC chip 6 and located atthe interface between the substrate sheet 1 and the first adhesive layer2.

The release agent layer 7 is formed in plural members of 2 or more,which are respectively arranged at interval. The shape and size of therelease agent layer 7, and the space between each release agent layers 7are not particularly limited. Various shapes, sizes and spaces can beutilized.

For example, as shown in FIG. 2, FIG. 8 and FIG. 9, the release agentlayer 7 can be formed to cover all surface at the position correspondingto the both ends of the circuit section 13, or as shown in FIGS. 3 a and3 b, the release agent layer 7 can be formed at the positioncorresponding to the intermediate section of the circuit section 13, butit is needed to leave the section at which the release agent layer 7 isnot covered. And as shown in FIGS. 6 a and 6 b, the release agent layer7 can be formed without covering of all surface at the positioncorresponding to the both ends of the circuit section 13 and withleaving of a section not to be covered in part. Further, the releaseagent layer 7 can be formed at the position corresponding to theintermediate section of the circuit section 13 without forming of therelease agent layer at the position corresponding to the both ends ofthe circuit section 13.

As the result of such structure, the first adhesive layer 2 is laminateddirectly on the surface of the substrate sheet 1 at positions withoutforming of the release agent layer 7. And the first adhesive layer 2 islaminated directly on the release agent layer 7 at positions withforming of the release agent layer 7. Therefore, when the IC tag ispeeled off after the IC tag is attached to the article 12, for example,the first adhesive layer 2 is peeled in interface between the firstadhesive layer 2 and the release agent layer 7 at positions with formingof the release agent layer 7, and the IC tag is torn in interfacebetween the article 12 and the second adhesive layer 5, or in the secondadhesive layer 5, at positions without forming of the release agentlayer 7. Accordingly, the electronic circuit 3 is peeled off togetherwith the substrate sheet 1 in the state that the electronic circuit 3 isattached to the first adhesive layer 2, and then the electronic circuit3 is cut.

The release agent layer 7 is formed to cover the range of preferably 20to 90 percents, more preferably 40 to 80 percents of an area surroundedby an outside circumference of the circuit section 13 through the firstadhesive layer 2.

The release agent layer 7 is preferably formed as the release agentlayer 7 projects over the outside circumference of the circuit section13. The width of the projecting area of the release agent layer 7 doesnot have any limitation. However, the width is preferably in the rangeof not less than 1 mm.

The shape of the release agent layer 7 includes preferably triangle,quadrangle, polygons such as pentagon and polygons having more than fiveangles, ellipse and circle (referred to FIG. 2, FIG. 3 a and FIG. 6 a).Two shapes of the release agent layer 7 may be same or different from.Two of the release agent layer 7 are preferably separated perfectly andindividually, but may be connected at a part of the release agent layer7.

Release agents used in the release agent layer 7 include, for example,silicone resin, long chain alkyl group-containing resin and fluororesin.

Thickness of the release agent layer 7 does not have any limitation.However, the thickness is preferably in the range of 0.01 to 5 μm andmore preferably in the range of 0.03 to 1 μm.

In the IC tag of the present invention, the electronic circuit 3 isformed on a surface of the first adhesive layer 2.

The electronic circuit 3 is composed of circuit line 4 of a conductivematerial. The conductive material includes, for example, metal simplesubstance such as metallic foil, vapor deposition film and thin filmproduced by sputtering. As the metal simple substance, gold, silver,nickel, copper, aluminium and the like can be used. Also, as theconductive material, conductive pastes produced by dispersing a particleof metal such as gold, silver, nickel and copper in a binder, can beused.

The average particle diameter of the metal particle is preferably in therange of 1 to 15 μm and more preferably in the range of 2 to 10 μm. Thebinder includes, for example, polyester resins, polyurethane resins,epoxy resins and phenol resins.

Thickness of the layer of circuit line 4 forming the electronic circuitdoes not have any limitation. However, the thickness of the metallicfoil is preferably in the range of 5 to 50 μm, the thickness of thevapor deposition film or metallic film produced by spattering ispreferably in the range of 0.01 to 1 μm and the thickness of conductivepaste is preferably in the range of 5 to 30 μm.

The width of the circuit line 4 is not particularly limited, butpreferably in the range of 0.01 to 10 mm, more preferably in the rangeof 0.1 to 3 mm.

The method for forming the electronic circuit 3 on the surface of thefirst adhesive layer 2, include, for example, a method for forming theelectronic circuit 3 by adhering a metallic foil to the substrate sheet1 with adhesive, etching-treating the metallic foil and then removingsections other than the electronic circuit. The etching-treatment can beconducted by the same treatment as general etching-treatment. Theforming of the electronic circuit 3 to the surface of the first adhesivelayer 2 can be also conducted by adhering the conductive paste in theshape of the electronic circuit 3 to the surface of the first adhesivelayer 2 by means such as printing and application.

The shape of the electronic circuit 3 includes, for example, shapesindicated by FIG. 2 and FIG. 3. In FIG. 2 and FIG. 3 a, the electroniccircuit 3 as an antenna is formed by arranging the circuit line 4 of aline of conductive material in decaplet ring having specific spacebetween each lines in the direction from the outside circumference of arectangle substrate sheet 1 to the inside. The electronic circuit 3 maybe arranged in decaplet ring as indicated in FIG. 2 and FIG. 3 a, or maybe arranged in singlet ring to nine ring, or eleven or more multipletring.

The circuit line 4 in the electronic circuit 3 has the bypass line 8.The circuit line 4 having a bypass line 8 can be a most inside circuitline 4, a most outside circuit line 4, or any one of the intermediatecircuit lines 4. The angle formed by the tangent 15 of the bypass line 8at the connection 14 between the bypass line 8 and the circuit line 4and the tangent 16 of the circuit line 4 at the connection is describedas angle θ in FIG. 5. The angle θ is 10 degree or greater, preferably 45degree or greater, more preferably 80 degree or greater. The upperlimitation of the angle θ is preferably less than 180 degree.

As the result of such structure, as shown in FIG. 4, the first adhesivelayer 2 is peeled off at the interface between the first adhesive layer2 and the release agent layer 7 in the state that the part of the bypassline 8 at the position with forming of the release agent layer 7 isattached to the first adhesive layer 2 and the second adhesive layer 5.At the position without forming of the release agent layer 7, the IC tagis torn in the second adhesive layer 5. Accordingly, the electroniccircuit 3 is peeled off together with the substrate sheet 1 in the statethat the electronic circuit 3 is attached to the first adhesive layer 2,and then the electronic circuit 3 is cut.

The shape of the bypass line 8 does not have any limitation, andincludes various shapes such as shapes lacking a part of periphery lineof ellipse and circle, shapes lacking a side of perimeter line oftriangle, shapes lacking a side of perimeter line of quadrangle such assquare, rectangle, rhomboid and trapezoid, shapes lacking a side ofperimeter line of polygons such as pentagon and polygons having morethan five angles.

The size of the bypass line 8 is normally small than the vacancy sectionsurrounded by the electronic circuit, when the bypass line 8 is formedat the most inside circuit line 4. And, The size of the bypass line 8 isnormally small than the size of the IC tag, when the bypass line 8 isformed at the most outside circuit line 4. The distance from the circuitline 4 to the portion of the bypass line 8 which is a longest way fromthe circuit line 4, is preferably not less than 2 mm.

The thickness of the bypass line 8 does not have any limitation, and isthe same as the thickness of the electronic circuit. The preferablerange of the thickness is the same as that of the electronic circuit.

The line width of the bypass line 8 does not have any limitation, and ispreferably 0.01 to 10 mm, more preferably 0.1 to 3 mm.

The number of the bypass line 8 is preferably 1 to 10, more preferably 1to 5. When the plural members of the bypass lines 8 are formed, theplural members of the bypass lines 8 may be same or different each otherin shape and/or size.

The circuit lines 4 has preferably the planar projection 9 extended.

The shape of the planar projection 9 includes preferably symmetricalpolygons such as square, regular hexagon, regular octagon and regulardecagon, and symmetrical shapes such as circular, and approximate shapesthereof.

The planar projection 9 has preferably an area calculated according tothe following formula.S≧(2W)²(In the formula, S is an area of the planar projection, and W is a linewidth of the circuit line adjoining to the planar projection.)

Further, the planar projection 9 has more preferably an area calculatedaccording to the following formula.S≧(4W)²(In the formula, S and W are the same as described above.)

The upper limitation of the area of the planar projection 9 ispreferably not more than 10%, more preferably not more than 5% and mostpreferably not more than 3% to the area of the vacancy sectionsurrounded by the electronic circuit.

The thickness of the planar projection 9 does not have any limitation,and is the same as the thickness of the electronic circuit. Thepreferable range of the thickness is the same as that of the electroniccircuit.

As shown in FIG. 3 a and FIG. 6 a, the planar projection 9 can beextended directly to the bypass line 8 of the circuit line 4 in theelectronic circuit 3, or can be extended by connecting to the bondingline 10 between the planar projection 9 and the bypass line 8 of thecircuit line 4.

As the result of such structure, as shown in FIG. 4, when the IC tag ispeeled by providing a cutting 17 into the interface between the article12 and the second adhesive layer 5 of the IC tag attached to the article12 with a cutter or the like, inserting a finger or the like into thecutting 17 and pinching the end of the IC tag, the first adhesive layer2 is peeled in interface between the first adhesive layer 2 and therelease agent layer 7 at positions with forming of the release agentlayer 7, in the state that the bypass line 8 or the planar projection 9are attached to the first adhesive layer 2 and the second adhesive layer5, and the IC tag is torn in interface between the article 12 and thesecond adhesive layer 5, or in the second adhesive layer 5 at positionswithout forming of the release agent layer 7. Accordingly, theelectronic circuit 3 is peeled off together with the substrate sheet 1in the state that the electronic circuit 3 is attached to the firstadhesive layer 2, and then the electronic circuit 3 is cut.

As shown in FIG. 8 and FIG. 9, the planar projection 9 can be extendeddirectly to the circuit line in the electronic circuit, or can beextended by connecting to the bonding line 10 between the planarprojection 9 and the circuit line.

As the result of such structure, when the antenna is not cut at theinterface of the release agent layer, as shown in FIG. 10, the IC tag ispeeled off in the state that a part of the planar projection is attachedto the substrate sheet. Therefore, the antenna function is broken.

The planar projection 9 can be extended to the most inside circuit line4 or the most outside circuit line 4 in the electronic circuit. Also,the planar projection 9 can be extended to any one circuit line 4 amongthe intermediate circuit lines 4. When the planar projection 9 isextended to the intermediate circuit line 4, the adjacent outsidecircuit line 4 is formed as avoiding the planar projection 9.

The number of the planar projection 9 is preferably 1 to 10, morepreferably 1 to 5.

The material of the bypass line 8 is the same as that of the circuitline 4 in the electronic circuit. The bypass line 8 is preferablyintegral with the circuit line 4.

The material of the planar projection 9 is preferably the same as thatof the circuit line 4 or the bonding line 10 in view of productionprocess, and the planar projection 9 is more preferably integral withthe circuit line 4 and the bonding line 10.

The material of the bonding line 10 is more preferably the same as thatof the circuit line 4 or planar projection 9.

The method for extending the bypass line 8, the planar projection 9and/or the bonding line 10 to the circuit line 4 in the electroniccircuit 3 includes various methods. For example, various methods includea method for forming the electronic circuit together with the bypassline 8, the planar projection 9 and/or the bonding line 10 by etching ametal foil, and a method for forming the bypass line 8 by printing orapplying to the circuit line 4 in the electronic circuit 3. The methodfor forming the electronic circuit together with the bypass line 8, theplanar projection 9 and/or the bonding line 10 by etching a metal foilis more preferable.

When the bypass line 8 and the planar projection 9 are formed, they canbe formed at the position without forming of the release agent layer 7.But, it is more preferable to form at least one of the bypass line 8 orthe planar projection 9 at the position with forming of the releaseagent layer 7 in the circuit section. When the planar projection 9 isextended to the bypass line 8, it is preferable to form at least one ofthe bypass line 8 having the planar projection 9 extended at theposition with forming of the release agent layer 7 in the circuitsection.

As another embodiment of the IC tag of the present invention, as shownin FIG. 9 and FIG. 10, the planar projection 9 can be extended directlyto the circuit line 4 in the electronic circuit 3, without forming ofthe bypass line 8 or the bonding line 10 to the circuit line 4 in theelectronic circuit 3. In this case, the planar projection 9 can beformed at the position without forming of the release agent layer 7.But, it is more preferable to form at least one of the planar projection9 at the position with forming of the release agent layer 7 in thecircuit section. The number of the planar projection 9 is preferably inthe range of 1 to 10, more preferably in the range of 1 to 5. When theplural members of the planar projection 9 are formed, the plural membersof the planar projection 9 may be same or different in shape and/or sizerespectively.

The IC chip 6 is connected to both ends of the electronic circuit 3. TheIC chip 6 can be formed inside of the electronic circuit 3, outside ofthe electronic circuit 3, or in the upper portion of the electroniccircuit 3.

In order to connect the ends of most outside ring and most inside ringof the electronic circuit 3 to the IC chip 6, the end of most outsidering or most inside ring of the electronic circuit 3 is preferablyconnected to the IC chip 6 by forming the line (jumper circuit) from theend over the ring electronic circuit 3 in direction of the inside or theoutside of the electronic circuit 3, without short circuit to the ringelectronic circuit 3.

The method for forming the jumper circuit includes a method for forminga conductive circuit line 4 by printing insulating ink in line crossingthe portion of the ring electronic circuit 3 from the end of theelectronic circuit 3 by screen printing or the like, and then printingconductive paste in line on the printed insulating ink by screenprinting or the like. The conductive paste includes that describedbefore. The insulating ink includes light curable ink such asultraviolet curable ink.

The method for connecting the IC chip 6 to the end of the electroniccircuit 3 includes a method for connecting by forming an anisotropicconductive film on the surface of the end of the electronic circuit 3and then connecting flip-chip bonding method via the anisotropicconductive film. The flip-chip bonding method is a method for conductingeasily between the end of the electronic circuit 3 and the IC chip 6 byforming a wire bump to an electrode portion of the IC chip 6, andpressing the surface of the wire bump formed on the IC chip 6 to theanisotropic conductive film covered on the surface of the end of theelectronic circuit 3 so that the wire bump insert in the anisotropicconductive film.

In the IC tag of the present invention, the second adhesive layer 5 islaminated to cover the electronic circuit 3, the IC chip 6 and thesurface of the first adhesive layer 2 on which the electronic circuit 3is not formed.

Adhesives used in the second adhesive layer 5 include various adhesivessuch as thermo melting adhesives, pressure-sensitive adhesives andthermosetting adhesives. The kinds of the adhesive include, for example,the same as adhesives used in the first adhesive layer 2, as describedbefore.

The adhesives can be used singly or in combination of two or moremembers. Among the adhesives, the pressure sensitive adhesives arepreferable and acrylic pressure sensitive adhesives are more preferable.

The surface of the second adhesive layer 5 is preferably flat.

Thickness of the second adhesive layer 5 does not have any limitation.However, the thickness of the portion covering the electronic circuit 3and the IC chip 6 is different from the thickness of the portioncovering the first adhesive layer 2. Maximum thickness is normally inthe range of 10 to 100 μm and preferably in the range of 15 to 50 μm.

The surface of the second adhesive layer 5 can be covered with therelease liner 11.

As the release liner 11, any release liners can be used. For example,release liners in which release treatment is conducted to the surface ofthe substrate to be contacted to the second adhesive layer 5 accordingto needs, can be used. As the substrate, films composed of variousresins such as polyethylene terephthalate, polybutylene terephthalate,polyethylene, polypropylene and polyarylate, and various paper materialssuch as papers laminated with polyethylene, papers laminated withpolypropylene, clay-coated papers, resin-coated papers and glassinepapers are illustrated.

In the case, representative examples include a formation of releaseagent layer composed of release agent such as silicone resin, long-chainalkyl group-containing resin and fluororesin.

The thickness of the release liner 11 does not have any limitation.However, the thickness can be decided properly.

The second adhesive layer 5 can be formed by applying directly to theelectronic circuit 3, the IC chip 6 and the surface of the firstadhesive layer 2 in which the electronic circuit 3 is not formed.Further, after the second adhesive layer 5 is formed by applying theadhesive on the surface of the release agent layer of the release liner11, the second adhesive layer 5 can be attached to the electroniccircuit 3, the IC chip 6 and the surface of the first adhesive layer 2in which the electronic circuit 3 is not formed.

Methods for forming the first adhesive layer 2, the second adhesivelayer 5 and the release agent layer 7 do not have any limitation, andvarious methods can be used. The methods include, for example, air knifecoater, blade coater, bar coater, gravure coater, roll coater, curtaincoater, die coater, knife coater, screen coater, Mayer bar coater andkiss coater.

As shown in FIG. 10, when the IC tag of another embodiment of thepresent invention is peeled off after the IC tag is attached to thearticle 12, the IC tag is peeled off in the same state as shown in FIG.4, except that the bypass line 8 does not exist. As the result, theelectronic circuit 3 is cut.

EXAMPLES

The present invention will be explained by examples more concretely inthe next paragraph. In addition, the present invention was notrestricted at all by these examples.

Example 1

A release agent layer 7 was formed by applying a silicone resin releaseagent in the shape as indicated in FIG. 2 (having angle of the obliqueline in trapezoid of 45°, width of unapplied portion of 3 mm, areacovered with two trapezoids and surrounded by an outside circumferenceof the electronic circuit of about 75 percents of area surrounded by anoutside circumference of the electronic circuit, and space lengthbetween the end of trapezoid and the outside of the substrate sheet 1 of1 mm), on one surface of polyethylene terephthalate film (having widthof 100 mm, length of 50 mm and thickness of 50 μm) in an amount to formthe dried thickness of 0.05 μm and then drying and curing at 130° C. for1 minutes. Next, polyester type thermo melting adhesive (produced byTOYO BOSEKI CO., LTD., trade name “BAYRON 30SS”) was applied on thesurface of the release agent layer 7 and the substrate sheet 1 bygravure coater in amount to form the dried thickness of 5 μm to laminatethe first adhesive layer 2. Further, on the surface of the firstadhesive layer 2, an electrolytic copper foil having thickness of 35 μmwas heated and pressed by heat seal roll of 100° C. Next, on the surfaceof the electrolytic copper foil, etching resist ink was printed indecaplet ring circuit line 4 (antenna) having long side of 45 mm, shortside of 15 mm and line width of 0.15 mm and also in the bypass line 8connected to the most inside circuit line 4 having line width of 0.15 mmby screen-printing method, as indicated in FIG. 2.

The printed electrolytic copper foil was etching-treated with a solutionof ferric chloride to remove the portion other than the ring circuitline 4 and the bypass line 8. And then, the etching resist ink wasremoved with an aqueous alkali solution to form the electronic circuit 3having the bypass line 8 as shown in FIG. 2.

With respect to size of the bypass line 8 and the angle θ of thetangent, the bypass line 8 having a shape lacking a long side ofperimeter of rectangle has length of 5 mm, width of 7 mm and the angle θof 90 degree. The bypass line 8 having a shape lacking a side ofperimeter of equilateral triangle has side length of 7 mm and the angleθ of 60 degree. The bypass line 8 having a shape of circle perimeter ofsemicircle has semidiameter of 3 mm and the angle θ of 85 degree. Thebypass line 8 having a shape lacking a upper bottom side of perimeter oftrapezoid has lower bottom side length of 10 mm, upper bottom sidelength of 3 mm, height of 5 mm and the angle θ of 145 degree.

In order to conduct the end of most inside ring of the electroniccircuit 3 (antenna) and the end of most outside of the electroniccircuit 3, an ultraviolet curable ink was printed to the space betweenthem in line shape by screen printing method. And then, ultravioletlight was irradiated to cure the ultraviolet curable ink. Next, a silverpaste (average particle diameter of silver particle of 5 μm, binder ofpolyester resin) was printed in line shape (having length of 10 mm) onthe surface of the cured line of the ultraviolet curable ink, and driedto form the jumper circuit.

Next, a wire bump was formed at the electrode portion of an IC chip 6(produced by PHILIPS CO., trade name of “I/CODE”) with a gold wire. TheIC chip 6 was connected to the both ends of the circuit through ananisotropic conductive film (produced by SONY CHEMICAL CO., LTD., tradename of “FP2322D”) by using the flip chip bonding method.

On the other hand, a release liner 11 having the second adhesive layer 5was prepared by applying an acrylic pressure sensitive adhesive(produced by LINTEC CORPORATION, trade name of “PA-T1”) on therelease-treated surface of the release liner obtained byrelease-treating all surface of one side of a glassine paper havingthickness of 70 μm with silicone resin by using roll knife coater, anddrying to form the second adhesive layer 5 having thickness of 10 μm.

Next, by attaching the second adhesive layer 5 in the release liner 11having the second adhesive layer 5 to all of the surface forming theelectronic circuit 3 and the IC chip 6 of the substrate sheet 1, thesecond adhesive layer 5 was covered on the first adhesive layer 2, theelectronic circuit 3 and the IC chip 6 to prepare the IC tag.

The obtained IC tag was tested by non-contact transmitting and receivingtest. As the result, the transmitting and receiving could be conductedcorrectly.

The all surface-treated release liner 11 in the IC tag was peeled off,and the IC tag was attached to a polypropylene resin plate. After 24hours, the IC tag was peeled off from the polypropylene resin plate byproviding the cutting 17 in the second adhesive layer by the length fromthe end of the IC tag to 5 mm inside with a cutter knife. The portion ofthe electronic circuit 3 covered with the release agent layer 7 was lefton the polypropylene resin plate. The portion other than the releaseagent layer 7 was peeled off from the polypropylene resin plate togetherwith the polyethylene terephthalate sheet of the substrate sheet 1.According to the peeling, the electronic circuit 3 was cut. The peeledIC tag was tested by non-contact transmitting and receiving test(peeling and cutting test). As the result, the transmitting andreceiving could be not conducted.

The peeling and cutting test was conducted to 30 IC tags. As the result,30 IC tags were cut.

Example 2

The IC tag was prepared in the same method as described in Example 1except that the planar projection 9 and the release agent layer 7 wereformed as shown in FIG. 3 a. The shape of the release agent layer 7 hasangle of the oblique line in regular triangle arranged at the bith endsof the circuit section of 45°, width of unapplied portion of 3 mm, areacovered with triangles in the both ends of the circuit section andrhomboid in the center section of the circuit section and surrounded byan outside circumference of the electronic circuit 3 and the IC chip 6of about 70 percents of area surrounded by an outside circumference ofthe electronic circuit, and space length between the end of triangle andthe outside of the substrate sheet 1 of 1 mm. The shape and size of thebypass line 8 are the same as that in Example 1. The size of the planarprojection 9 is a circle having diameter of 2 mm and thickness of 35 mm.The bonding line 10 has length of 0.5 mm, width of 0.1 mm and thicknessof 35 μm. The obtained IC tag was tested by non-contact transmitting andreceiving test. As the result, the transmitting and receiving could beconducted correctly.

The peeling and cutting test was conducted to 30 IC tags. As the result,30 IC tags were cut.

Example 3

The IC tag was prepared in the same method as described in Example 1except that the bypass line 8 was not formed, the planar projection 9was extended directly to the circuit line 4, and the planar projection 9and the release agent layer 7 were formed as shown in FIG. 6 a. Theshape of the release agent layer 7 has angle of the oblique line inpentagon of 45°, width of unapplied portion of 3 mm, area covered withtwo pentagon and surrounded by an outside circumference of theelectronic circuit 3 of about 60 percents of area surrounded by anoutside circumference of the electronic circuit, and space lengthbetween the end of pentagon and the outside of the substrate sheet 1 of1 mm. The size of the planar projections 9 are each a circle havingdiameter of 2 mm and a square having side length of 2 mm, and thicknessof 35 mm. The bonding line 10 has length of 0.5 mm, width of 0.1 mm andthickness of 35 μm. The obtained IC tag was tested by non-contacttransmitting and receiving test. As the result, the transmitting andreceiving could be conducted correctly.

The peeling and cutting test was conducted to 30 IC tags. As the result,30 IC tags were cut.

Example 4

A release agent layer 7 was formed by applying a silicone resin releaseagent in the shape as indicated in FIG. 8 (having angle of the obliqueline in trapezoid of 45°, width of unapplied portion of 3 mm, areacovered with two trapezoids and surrounded by an outside circumferenceof the electronic circuit of about 75 percents of area surrounded by anoutside circumference of the electronic circuit, and space lengthbetween the end of trapezoid and the outside of the substrate sheet 1 of1 mm), on one surface of polyethylene terephthalate film (having widthof 100 mm, length of 50 mm and thickness of 50 μm) in an amount to formthe dried thickness of 0.05 μm and then drying and curing at 130° C. for1 minutes. Next, polyester type thermo melting adhesive (produced byTOYO BOSEKI CO., LTD., trade name “BAYRON 30SS”) was applied on thesurface of the release agent layer 7 and the substrate sheet 1 bygravure coater in amount to form the dried thickness of 3 μm to laminatethe first adhesive layer 2. Further, on the surface of the firstadhesive layer 2, an electrolytic copper foil having thickness of 35 μmwas heated and pressed by heat seal roll of 100° C. Next, on the surfaceof the electrolytic copper foil, etching resist ink was printed indecaplet ring circuit line 4 (antenna) having long side of 45 mm, shortside of 15 mm and line width of 0.15 mm and also in the planarprojection 9 and the bonding line 10 connected to the most insidecircuit line by screen-printing method, as indicated in FIG. 8.

The printed electrolytic copper foil was etching-treated with a solutionof ferric chloride to remove the portion other than the ring circuitline, the planar projection 9 and the bonding line 10. And then, theetching resist ink was removed with an aqueous alkali solution to formthe electronic circuit 3 having the planar projection 9 and the bondingline 10 extend as shown in FIG. 8. The size of the planar projection 9are each a circle having diameter of 1 mm and thickness of 35 mm. Thebonding line 10 has length of 0.5 mm, width of 0.1 mm and thickness of35 μm.

In order to conduct the end of most inside ring of the electroniccircuit 3 (antenna) and the end of most outside of the electroniccircuit 3, an ultraviolet curable ink was printed to the space betweenthem in line shape by screen printing method. And then, ultravioletlight was irradiated to cure the ultraviolet curable ink. Next, a silverpaste (average particle diameter of silver particle of 5 μm, binder ofpolyester resin) was printed in line shape (having length of 10 mm) onthe surface of the cured line of the ultraviolet curable ink, and driedto form the jumper circuit.

Next, a wire bump was formed at the electrode portion of an IC chip 6(produced by PHILIPS CO., trade name of “I/CODE”) with a gold wire. TheIC chip 6 was connected to the both ends of the circuit through ananisotropic conductive film (produced by SONY CHEMICAL CO., LTD., tradename of “FP2322D”) by using the flip chip bonding method.

On the other hand, a release liner 11 having the second adhesive layer 5was prepared by applying an acrylic pressure-sensitive adhesive(produced by LINTEC CORPORATION, trade name of “PA-T1”) on therelease-treated surface of the release liner obtained byrelease-treating all surface of one side of a glassine paper havingthickness of 70 μm with silicone resin by using roll knife coater, anddrying to form the second adhesive layer 5 having thickness of 20 μm.

Next, by attaching the second adhesive layer 5 in the release liner 11having the second adhesive layer 5 to all of the surface forming theelectronic circuit 3 and the IC chip 6 of the substrate sheet 1, thesecond adhesive layer 5 was covered on the first adhesive layer 2, theelectronic circuit 3 and the IC chip 6 to prepare the IC tag.

The obtained IC tag was tested by non-contact transmitting and receivingtest. As the result, the transmitting and receiving could be conductedcorrectly.

The all surface-treated release liner 11 in the IC tag was peeled off,and the IC tag was attached to a polypropylene resin plate. After 24hours, the IC tag was peeled off from the polypropylene resin plate byproviding the cutting 17 in the second adhesive layer by the length fromthe end of the IC tag to 5 mm inside with a cutter knife.

The peeling and cutting test was conducted to 10 IC tags. As the result,10 IC tags were cut.

Example 5

The IC tag was prepared in the same method as described in Example 1except that the planar projection 9 and the release agent layer 7(having area covered with two quadrangle and surrounded by an outsidecircumference of the electronic circuit of about 75 percents of areasurrounded by an outside circumference of the electronic circuit) wereformed as shown in FIG. 9. The size of the planar projection 9 is asquare having side length of 2 mm and thickness of 35 mm. The obtainedIC tag was tested by non-contact transmitting and receiving test. As theresult, the transmitting and receiving could be conducted correctly.

The peeling and cutting test was conducted to 10 IC tags in the samemethod as described in Example 1. As the result, 10 IC tags were cut.

Example 6

The IC tag was prepared in the same method as described in Example 2except that the planar projection 9 was formed in a shape as shown inFIG. 11. The size of the planar projection 9 is a circle having diameterof 2 mm and thickness of 35 mm. The obtained IC tag was tested bynon-contact transmitting and receiving test. As the result, thetransmitting and receiving could be conducted correctly.

The peeling and cutting test was conducted to 10 IC tags in the samemethod as described in Example 1. As the result, 10 IC tags were cut.

Comparative Example 1

The IC tag was prepared in the same method as described in Example 1except that the bypass line 8 was not formed. The obtained IC tag wastested by non-contact transmitting and receiving test. As the result,the transmitting and receiving could be conducted correctly.

The peeling and cutting test was conducted to 10 IC tags in the samemethod as described in Example 1. As the result, 6 IC tags among 10 ICtags could be peeled without breaking of the electronic circuit. The ICtags peeled without breaking of the electronic circuit were tested bynon-contact transmitting and receiving test. As the result, thetransmitting and receiving could be conducted correctly.

The IC tag of the present invention can be utilized as the managementtag of articles such as goods, storage articles and loadings.

1. An IC tag which has a structure comprising a first adhesive layerlaminated on a surface of a substrate sheet, an electronic circuitcontaining a circuit line having a bypass line, in which the angleformed by the tangent of the bypass line at the connection between thebypass line and the circuit line and the tangent of the circuit line atthe connection is 45° or greater, and an IC chip connecting to theelectronic circuit, the IC chip and the electronic circuit being formedon a surface of the first adhesive layer, a second adhesive layerlaminated for covering the electronic circuit and the IC chip, and arelease agent layer formed partly at the position corresponding to acircuit section consisting of the electronic circuit and the IC chip andlocated at the interface between the substrate sheet and the firstadhesive layer, wherein the bypass line is formed in the middle sectionof the circuit line spaced from both end points of the circuit line. 2.The IC tag as claimed in claim 1, wherein a planar projection isextended to the bypass line.
 3. The IC tag as claimed in claim 1,wherein the release agent layer is formed to cover the range of 20 to 90percents of an area surrounded by an outside circumference.
 4. The ICtag as claimed in claim 1, wherein a release liner is formed on asurface of the second adhesive layer.
 5. An IC tag which has a structurecomprising a first adhesive layer laminated on a surface of a substratesheet, an electronic circuit having a planar projection extended and anIC chip connecting to the electronic circuit, the IC chip and theelectronic circuit being formed on a surface of the first adhesivelayer, a second adhesive layer laminated for covering the electroniccircuit and the IC chip, and a release agent layer formed partly at theposition corresponding to a circuit section consisting of the electroniccircuit and the IC chip and located at the interface between thesubstrate sheet and the first adhesive layer, wherein at least onebypass line is formed at the position in the circuit section in whichthe release agent layer is formed.
 6. The IC tag as claimed in claim 5,wherein the planer projection has an area calculated according to thefollowing formula.S=(SW)2 (In the formula, S is an area of the planar projection, and W isa line width of the circuit line adjoining to the planar projection). 7.An IC tag which has a structure comprising a first adhesive layerlaminated on a surface of a substrate sheet, on electronic circuithaving a planer projection extended and an IC chip connecting to theelectronic circuit, the IC chip and the electronic circuit being formedon a surface of the first adhesive layer, a second adhesive layerlaminated for covering the electronic circuit and the IC chip, and arelease agent layer formed partly at the position corresponding to bothend portions of a circuit section consisting of the electronic circuitand the IC chip and located at the interface between the substrate sheetand the first adhesive layer, wherein at least one of bypass line isformed at the position in the circuit section in which the release agentlayer is formed.